#ifndef ITG3205_
#define ITG3205_

#include "common.h"

#ifdef __cplusplus
extern "C"
{
#endif

//Definition of ITG3205 Register
#define ITG3205_ADDR 			0x68
#define ITG3205_RA_WHO_AM_I 	0x00
#define ITG3205_RA_SMPLRT_DIV 	0x15
#define ITG3205_RA_DLPF_FS 		0x16
#define ITG3205_RA_INT_CFG 		0x17
#define ITG3205_RA_INT_STATUS 	0x1A
#define ITG3205_RA_TEMP_OUT_H 	0x1B
#define ITG3205_RA_TEMP_OUT_L 	0x1C
#define ITG3205_RA_GYRO_XOUT_H 	0x1D
#define ITG3205_RA_GYRO_XOUT_L 	0x1E
#define ITG3205_RA_GYRO_YOUT_H 	0x1F
#define ITG3205_RA_GYRO_YOUT_L 	0x20
#define ITG3205_RA_GYRO_ZOUT_H 	0x21
#define ITG3205_RA_GYRO_ZOUT_L 	0x22
#define ITG3205_RA_PWR_MGM 		0x3E

//CLK SOURCE
#define ITG3205_INPLL 			0x00
#define ITG3205_XPLL 			0x01
#define ITG3205_YPLL 			0x02
#define ITG3205_ZPLL 			0x03


//FULL SCALE + LPF + INTERN SAMPLING FREQ	//Internal Sample Rate
#define ITG3205_LPF_256HZ	0x00			//8kHz
#define ITG3205_LPF_188HZ	0x01			//1kHz
#define ITG3205_LPF_98HZ	0x02			//1kHz
#define ITG3205_LPF_42HZ	0x03			//1kHz
#define ITG3205_LPF_20HZ	0x04			//1kHz
#define ITG3205_LPF_10HZ	0x05			//1kHz
#define ITG3205_LPF_5HZ		0x06			//1kHz
#define FULLSCALE_SEL		0x18		//Set to 0b11000 for proper operation

/* Interrupt Status */
#define ITG_RDY				0x04
#define RAW_DATA_RDY		0x01

/* Interrupt Configuration */
//Logic Level
#define ACTL				0x80
//Drain
#define OPEN_DRAIN			0x40
//Latch mode
#define LATCH_INT_EN		0x20
//Latch clear mode
#define INT_ANYRD_2CLEAR	0x10
//Enable Interrupt when
#define ITG_RDY_EN			0x04
#define RAW_RDY_EN			0x01

int ITG3205_CONNECT(GIO_Handle inhd,GIO_Handle outhd);

/* ITG3205_SET_LPF
 * This function is required for proper operation,
 * it sets the gyro to operate at full scale and
 * configure the LPF frequency
 * */
int ITG3205_SET_LPF(GIO_Handle inhd,GIO_Handle outhd, Uint8 LPF_val);

/* ITG3205_SET_SRD
 * Set Sample Rate Divider:
 * F_sample = F_internal/(divider+1),
 * where F_internal = 1kHz or 8kHz
 * depends on the LPF setting.
 * */
int ITG3205_SET_SRD(GIO_Handle inhd,GIO_Handle outhd, Uint8 SRD_val);

int ITG3205_READ_REG(GIO_Handle inhd,GIO_Handle outhd, Uint8 REG, Uint8 *buf, size_t len);
int ITG3205_WRITE_REG(GIO_Handle inhd,GIO_Handle outhd, Uint8 REG,Uint8 value, op_mode op);

/* Set INT configuration */
/*This register configures the interrupt operation of the device.
 * The interrupt output pin (INT) configuration can be set, the interrupt
 * latching/clearing method can be set, and the triggers for the interrupt
 * can be set. Note that if the application requires reading every sample of data from the
 * ITG-3200 part, it is best to enable the raw data ready interrupt (RAW_RDY_EN).
 * This allows the application to know when new sample data is available.
 * ------------------------------------------------------------
 * Bit7	Bit6	Bit5	Bit4	Bit3	Bit2	Bit1	Bit0
 * ACTL	OPEN	LAIE	INA2	0		ITRE	0		RARE
 * ------------------------------------------------------------
 * ACTL --	Logic level for INT output pin 1= active low, 0 = active high
 * OPEN --	Drive type for INT output pin  1= open drain, 0 = push-pull
 * LATCH_INT_EN --	Latch mode 1=latch until interrupt is cleared, 0=50us pulse
 * INT_ANYRD_2CLEAR --	Latch clear method 1=any register read, 0=status register read only
 * ITG_RDY_EN -- Enable interrupt when device is ready (PLL ready after changing clock source)
 * RAW_RDY_EN -- Enable interrupt when data is available
 * 0 -- Load zeros into Bits 1 and 3 of the Interrupt Configuration register.
 */
int ITG3205_INT_CFG(GIO_Handle inhd,GIO_Handle outhd, Uint8 int_cfg);

/* Read Interrupt Status */
/* Use the Interrupt Configuration register (23) to enable the interrupt triggers.
 * If the interrupt is not enabled, the associated status bit will not get set.
 * Interrupt Status bits get cleared as determined by INT_ANYRD_2CLEAR in
 * the interrupt configuration register (23).
 * Parameters:
 * ITG_RDY: PLL ready
 * RAW_DATA_RDY: Raw data is ready
 * */
int ITG3205_READ_INT_STATUS(GIO_Handle inhd,GIO_Handle outhd, Uint8 * buf);



int ITG3205_SET_INT_LogicLV(GIO_Handle inhd,GIO_Handle outhd, Bool type);
int ITG3205_SET_INT_DriveType(GIO_Handle inhd,GIO_Handle outhd,Bool int_latchclr);
int ITG3205_SET_INT_LatchMode(GIO_Handle inhd,GIO_Handle outhd, Bool type);
int ITG3205_SET_INT_LatchClrMode(GIO_Handle inhd,GIO_Handle outhd, Bool type);
int ITG3205_SET_INT_ITGRDY(GIO_Handle inhd,GIO_Handle outhd, Bool int_itgrdy);
int ITG3205_SET_INT_RAWRDY(GIO_Handle inhd,GIO_Handle outhd, Bool int_rawrdy);


int ITG3205_RESET(GIO_Handle inhd,GIO_Handle outhd);
int ITG3205_WAKEUP(GIO_Handle inhd,GIO_Handle outhd);
int ITG3205_SLEEP(GIO_Handle inhd,GIO_Handle outhd);

int ITG3205_SET_AXES_PWR_MODE(GIO_Handle inhd,GIO_Handle outhd, Uint8 x_pwm,Uint8 y_pwm,Uint8 z_pwm);
int ITG3205_CLKSEL(GIO_Handle inhd,GIO_Handle outhd, Uint8 clk_source);


int ITG3205_GET_RDATA(GIO_Handle inhd,GIO_Handle outhd, short *rdata);
void ITG3205_SCALE_DATA(short*rdata, double *data);
void ITG3205_CAL_DATA(short*rdata, double *data, Uint8 mode);	//rdata-raw data, data-output 3*1, mode

#ifdef __cplusplus
}
#endif /* extern "C" */


#endif
